RISC vs CISC: Studi Kinerja dan Efisiensi dalam Organisasi Arsitektur Komputer
DOI:
https://doi.org/10.61132/jupiter.v3i4.973Keywords:
RISC, CISC, Computer Architecture, Performance, Efficiency, Computer OrganizationAbstract
The evolution of computer architecture has given rise to two main approaches: RISC (Reduced Instruction Set Computer) and CISC (Complex Instruction Set Computer). These architectures differ significantly in terms of instruction design, efficiency, and performance. This study aims to analyze the performance and efficiency of RISC and CISC in the context of computer architecture organization. The methodology includes a literature review, comparative analysis, and performance evaluation based on parameters such as processing speed, power consumption, and design complexity. The results indicate that RISC tends to be more efficient in terms of power consumption and execution speed for simple instructions, while CISC excels in handling complex instructions with fewer lines of code. The findings of this study can serve as a reference for the development of modern computer architectures that balance performance and efficiency.
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